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;;		Sample Routines for GB1024
;;
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	Public	_set_vga
	Public	_set_def_tiga
	Public	_clear_burst


; The following flag determines whether we are running with burst mode or not.
; If 1 then we are assembling with burst mode ON, if 0 burst mode is OFF.
HERCBURST	equ	1		; set to 1 for clear burst mode,


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;;	HOST MEMORY MAP
;;
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; Hercules Full Spectrum Host port addresses
HSTSEG		equ	0c000h	; Host I/O Segment
HSTADRH		equ	07F00h  ; Address high word
HSTADRL		equ	07E00h  ; Address low word
HSTCTRL		equ	07D00h  ; Host control register
HSTDATA		equ	07000h  ; Host data register

HSTDSEG		EQU	0A000H		; segment mapped to data regsister


;	VGA Enable (Burst mode for GB1024)
;
VGA_ENBL_PORT	EQU	046E8H		; port to turn on VGA (WORD PORT)
VGA_ENBL_ON	EQU	0EH		; turn VGA on
VGA_ENBL_OFF	EQU	06H		; turn VGA off

;	VGA Palette
;
DAC_EXT_CMD_REG	EQU	3C6H		; IO Port to DAC
DAC_8BIT_PSEUDO	EQU	04Bh		; 8 bit pseudo color, no overlay


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;;	34010 MEMORY MAP
;; See the TI 34010 user manual
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

; Hercules Full Spectrum I/O Registers
IOSEG	EQU	0c000H	; TMS34010 I/O Register Segment
HTOTAL	EQU	0030H	; HTOTAL register
HSBLNK	EQU	0020H	; HORIZONTAL START BLANK REGISTER
HEBLNK	EQU	0010H	; HORIZONTAL END BLANK REGISTER
HESYNC	EQU	0000H	; HORIZONTAL END SYNC REGISTER

VTOTAL	EQU	0070H	; HTOTAL register
VSBLNK	EQU	0060H	; HORIZONTAL START BLANK REGISTER
VEBLNK	EQU	0050H	; HORIZONTAL END BLANK REGISTER
VESYNC	EQU	0040H	; HORIZONTAL END SYNC REGISTER

DPYCTL	EQU	0080H	; Display Control Register
DPYSTRT	EQU	0090H	; Display Start

INTPEND	EQU	0120H	; INT Pending register
INTENB	EQU	0110H	; INT Enable register
HSTCTLH	EQU	0100H	; Host control word - HI byte

DPYTAP	EQU	01B0H	; display tap point

; Video Buffer Address on 34010
VIDEO_AHI	equ	0000H		;hi word of video address
VIDEO_ALO	equ	0000H		;lo word of video address

SIMM_AHI	equ	0700H		; hi word of SIMM address
SIMM_ALO	equ	0000H		; low word of SIMM address


;-----------------------------------------------------------------------
; I/O registers specific to the Graphics Station are defined here          
;-----------------------------------------------------------------------

HERC_REG_HI		EQU	0600H

DAC_WRITE_REG		EQU	0000H
DAC_DATA_REG		EQU	0010H
DAC_CMD_REG		EQU	0020H
DAC_READ_REG		EQU	0030H

CLK_CMD_REG		EQU	00C0H
PXL_SYNC_REG		EQU	00E0H
PXL_SYNC_READ		EQU	01E0H
CLK_CMD_READ		EQU	01C0H


ENABLE_DAC_EXT 		EQU	8


; Reg values for CLK_CMD_REG for 640x480
DEF_PXL_SYNC	equ	03H		; default 640x480 mode 
DEF_CLK_CMD	equ	06H		; default 640x480 - VGA mode
VGA_CLK_CMD	equ	02H
ENABLE_DAC_EXT	equ	8


;	Macro for HERCBURST
; Set Seg with segment used in burst modes
; Use Seg=ES for default:
Setup_BUR	Macro	Seg
        mov     ax,HSTDSEG

        Ifnb    <Seg>
        mov     Seg,ax
        Else        
        mov     es,ax
        Endif
 
		Endm


;-------------------------------------------------------------------
_TEXT	SEGMENT		PARA PUBLIC 'CODE'
	ASSUME		CS:_TEXT


;---------------------------------------------------
;	Set Board to VGA mode
;
;---------------------------------------------------

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Setup a default TIGA mode.
; Set Burst mode (ie use VGA segment)
;
_set_vga	PROC

; set PIXEL/SYNC reg for VGA
	mov	ax,PXL_SYNC_REG
	mov	bx,HERC_REG_HI
	mov	es:[HSTADRH],bx
	mov	es:[HSTADRL],ax

	xor	ax,ax
	mov	es:[HSTDATA],ax

; Set VGA clock & enable DAC extender
	mov	ax,CLK_CMD_REG
	mov	bx,HERC_REG_HI
	mov	es:[HSTADRH],bx
	mov	es:[HSTADRL],ax

	mov	ax,VGA_CLK_CMD OR ENABLE_DAC_EXT
	mov	es:[HSTDATA],ax

; Setup DAC for VGA emulation
	mov	dx,DAC_EXT_CMD_REG
	mov	al,DAC_8BIT_PSEUDO	; 8 bit pseudo color, no overlay
	out	dx,al	

; Dispable DAC extended registers
	mov	ax,CLK_CMD_REG
	mov	bx,HERC_REG_HI
	mov	es:[HSTADRH],bx
	mov	es:[HSTADRL],ax

	mov	ax,VGA_CLK_CMD
	mov	es:[HSTDATA],ax

; shut off 16 bit mode
	mov	ax,VGA_ENBL_ON
	mov	dx,VGA_ENBL_PORT
	out	dx,ax

; Reset Host address ports to zero
	xor	ax,ax
	mov	es:[HSTADRH],ax
	mov	es:[HSTADRL],ax

	ret
_set_vga	ENDP


;---------------------------------------------------
;	Set Board to GSP mode
;
;---------------------------------------------------


;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Setup a default 640x480 8 bit mode.
;
_set_def_tiga	PROC
	mov	ax,HSTSEG
	mov	es,ax

	mov	ax,PXL_SYNC_REG
	mov	bx,HERC_REG_HI
	mov	es:[HSTADRH],ax
	mov	es:[HSTADRL],bx

	mov	ax,DEF_PXL_SYNC		; default pixel/sync mode
	mov	es:[HSTDATA],ax


	mov	ax,CLK_CMD_REG
	mov	bx,HERC_REG_HI
	mov	es:[HSTADRH],ax
	mov	es:[HSTADRL],bx

	mov	ax,DEF_CLK_CMD
	mov	es:[HSTDATA],ax

;
	ret
_set_def_tiga	ENDP



;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;	Fill video frame with color
; HERCBURST -	Turns on burst mode.
;		Fills frame buffer.
;		Shut off burst mode.
;
; AX = 16 bit value to fill frame with.
; BX = number of 32K blocks to fill.
;
_clear_burst	PROC
	push	ds
	push	di

	push	ax			; Save color on stack
;
	mov	ax,HSTSEG
	mov	es,ax

	xor	ax,ax
	mov	es:[HSTADRH],ax
	mov	es:[HSTADRL],ax

if	HERCBURST			; shut off VGA mode
; Turn on burst mode - for screen clearing.
	mov	ax,VGA_ENBL_OFF
	mov	dx,VGA_ENBL_PORT
	out	dx,ax			; shut off VGA
;
	Setup_BUR
else
	or	es:[HSTCTRL],INCR OR INCW
endif
;
	
	pop	ax
	cld
gsp_mem_clr:
	mov	cx,3FFFH		; 32K/2 words
	xor	di,di

if	HERCBURST
	rep stosw
else
;	write to video through HSTDATA in INCW mode.
clear_it:
	Write_HSTDATA	ax
	loop	clear_it
endif
	sub	bx,1
	jne	gsp_mem_clr

if	HERCBURST			; Shut off burst mode.
	mov	ax,VGA_ENBL_ON
	mov	dx,VGA_ENBL_PORT
	out	dx,ax			; shut off VGA
endif

;
	pop	di
	pop	ds
	ret
_clear_burst	ENDP


_TEXT           ENDS                    ; End of code segment
	End


